Unsupported Multiplexed Row And Column Address Bits - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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Table 6-16. Unsupported Multiplexed Row and Column Address Bits
32-bit Data Bus Mode
Table 6-17. Supported FPM or EDO DRAM Device Configurations
Devices
DRAM
(64-bit
Devices
Bank)
4 Mbits
4
4
8
8
16
16
64
64
16 Mbits
2
2
4
4
4
8
8
16
16
64
64
Chapter 6. MPC8240 Memory Interface
64-bit Data Bus Mode
13x10
13x9
13x8
12x8
12x7
11x8
11x7
10x8
Device
Row x Column
Configuration
Bits
256 Kbits x 16
9 x 9
256 Kbits x 16
10 x 8
(64-bit only)
512 Kbits x 8
10 x 9
512 Kbits x 8
11 x 8
(64-bit only)
1 Mbits x 4
10 x 10
1 Mbits x 4
11 x 9
4 Mbits x 1
12 x 10
4 Mbits x 1
11 x 11
512 Kbits x 32
11 x 8
512 Kbits x 32
10 x 9
1 Mbits x 16
12 x 8
(64-bit only)
1 Mbits x 16
11 x 9
1 Mbits x 16
10 x 10
2 Mbits x 8
12 x 9
2 Mbits x 8
11 x 10
4 Mbits x 4
12 x 10
4 Mbits x 4
11 x 11
16 Mbits x 1
13 x 11
16 Mbits x 1
12 x 12
FPM or EDO DRAM Interface Operation
13x10
13x9
13x8
12x7
11x7
64-bit
8 Banks of
Bank Size
Memory
(Mbytes)
(Mbytes)
2
2
4
4
8
8
32
256
32
256
4
4
8
8
8
16
128
16
128
32
256
32
256
128
1024
128
1024
16
16
32
32
64
64
32
32
64
64
64
6-49

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