Address Maps - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
Table of Contents

Advertisement

Chapter 16, "Programmable I/O and Watchpoint," describes the capabilities of the
TRIG_IN signal, and how the TRIG_OUT signal can be generated based on
programmable watchpoints on the internal processor bus.
Appendix A, "Address Map A." The MPC8240 supports two address maps. This
appendix describes address map A.
Appendix B, "Bit and Byte Ordering," describes the big- and little-endian modes
and provides examples of each.
Appendix C, "Initialization Example," contains an example PowerPC assembly
language routine for initializing the configuration registers for the MPC8240 using
address map B.
Appendix D, "PowerPC Instruction Set Listings," lists the MPC8240
microprocessor's instruction set as well as the additional PowerPC instructions not
implemented in the MPC8240.
Appendix E, "Processor Core Register Summary," summarizes the register set in
the processor core of the MPC8240 as defined by the three programming
environments of the PowerPC architecture.
Suggested Reading
This section lists additional reading that provides background for the information in this
manual as well as general information about the PowerPC architecture.
General Information
The following documentation provides useful information about the PowerPC architecture
and computer architecture in general:
• The following books are available from the PCI Special Interest Group, P.O. Box
14070, Portland, OR 97214; Tel. (800) 433-5177 (U.S.A.), (503) 797-4207
(International).
— Local Bus Specification, Rev 2.1
— PCI System Design Guide, Rev 1.0
• The following books are available from the Morgan-Kaufmann Publishers, 340 Pine
Street, Sixth Floor, San Francisco, CA 94104; Tel. (800) 745-7323 (U.S.A.), (415)
392-2665 (International); web site: www.mkp.com; internet address:
mkp@mkp.com.
— The PowerPC Architecture: A Specification for a New Family of RISC
Processors, Second Edition, by International Business Machines, Inc.
— Updates to the architecture specification are accessible via the world-wide web
at http://www.austin.ibm.com/tech/ppc-chg.html.
— PowerPC Microprocessor Common Hardware Reference Platform: A System
About This Book
Suggested Reading
xli

Advertisement

Table of Contents
loading

Table of Contents