Dl Error Injection Mask Register - Motorola MPC8240 User Manual

Memory Data Path Error Injection/Capture
Figure 15-8 shows the bit definitions of the DH error injection mask register.
Table 15-8. DH Error Injection Mask Bit Field Definitions
Bits Name
31–0 DH[31:0]

15.5.1.2 DL Error Injection Mask Register

Figure 15-19 shows the bits of the DL error injection mask register.
31
Figure 15-19. DL Error Injection Mask (MDP_ERR_INJ_MASK_DL)—Offsets
Figure 15-9 shows the bit definitions of the DL error injection mask register
Table 15-9. DL Error Injection Mask Bit Field Definitions
Bits Name
31–0 DL[31:0]
15.5.1.3 Parity Error Injection Mask Register
Figure 15-20 shows the bits of the DH error injection mask register and Table 15-10 shows
the bit definitions.
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31
Figure 15-20. Parity Error Injection Mask (MDP_ERR_INJ_MASK_PAR)—
15-18
Reset
R/W
Value
all 0s R/W
DL[31:0]
0xF_F004, 0xF04
Reset Value R/W
all 0s R/W Error injection mask for memory data path data bus low
Offsets 0xF_F008, 0xF08
MPC8240 Integrated Processor User's Manual
Description
Error injection mask for memory data path data bus high
Description
RD_EN
10 9 8
0
Reserved
WR_EN
DPAR[7:0]
7 0