Motorola MPC8240 User Manual page 418

Integrated host processor with integrated pci
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EPIC Register Summary
Table 11-3. EPIC Register Address Map—Interrupt Source
Address Offset
from EUMBBAR
0x5_0270
Serial interrupt 3 destination register (SDR3)
0x5_0280
Serial interrupt 4 vector/priority register (SVPR4)
0x5_0290
Serial interrupt 4 destination register (SDR4)
0x5_02A0
Serial interrupt 5 vector/priority register (SVPR5)
0x5_02B0
Serial interrupt 5 destination register (SDR5)
0x5_02C0
Serial interrupt 6 vector/priority register (SVPR6)
0x5_02D0
Serial interrupt 6 destination register (SDR6)
0x5_02E0
Serial interrupt 7 vector/priority register (SVPR7)
0x5_02F0
Serial interrupt 7 destination register (SDR7)
0x5_0300
Serial interrupt 8 vector/priority register (SVPR8)
0x5_0310
Serial interrupt 8 destination register (SDR8)
0x5_0320
Serial interrupt 9 vector/priority register (SVPR9)
0x5_0330
Serial interrupt 9 destination register (SDR9)
0x5_0340
Serial interrupt 10 vector/priority register (SVPR10)
0x5_0350
Serial interrupt 10 destination register (SDR10)
0x5_0360
Serial interrupt 11 vector/priority register (SVPR11)
0x5_0370
Serial interrupt 11 destination register (SDR11)
0x5_0380
Serial interrupt 12 vector/priority register (SVPR12)
0x5_0390
Serial interrupt 12 destination register (SDR12)
0x5_03A0
Serial interrupt 13 vector/priority register (SVPR13)
0x5_03B0
Serial interrupt 13 destination register (SDR13)
0x5_03C0
Serial interrupt 14 vector/priority register (SVPR14)
0x5_03D0
Serial interrupt 14 destination register (SDR14)
0x5_03E0
Serial interrupt 15 vector/priority register (SVPR15)
0x5_03F0
Serial interrupt 15 destination register (SDR15)
0x5_0400–0x5_1010
Reserved
0x5_1020
I
0x5_1030
I
0x5_1040
DMA Ch0 interrupt vector/priority register (IIVPR1)
0x5_1050
DMA Ch0 interrupt destination register (IIDR1)
0x5_1060
DMA Ch1 interrupt vector/priority register (IIVPR2)
0x5_1070
DMA Ch1 interrupt destination register (IIDR2)
0x5_1080–0x5_10B0
Reserved
0x5_10C0
Message unit interrupt vector/priority register
(IIVPR3)
11-6
Configuration Registers (Continued)
Register Name
2
C interrupt vector/priority register (IIVPR0)
2
C interrupt destination register (IIDR0)
MPC8240 Integrated Processor User's Manual
Field Mnemonics
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, P, S, PRIORITY, VECTOR
P0
M, A, PRIORITY, VECTOR
P0
M, A, PRIORITY, VECTOR
P0
M, A, PRIORITY, VECTOR
P0
M, A, PRIORITY, VECTOR

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