Rom/Flash Interface Operation - Motorola MPC8240 User Manual

6.4 ROM/Flash Interface Operation

For the ROM/Flash interface, the MPC8240 provides 21 address bits, two chip selects, one
Flash output enable (FOE), and one flash write enable (WE).
Figure 6-49 displays a block diagram of the ROM interface.
Address
(Processor or PCI)
Central Control Unit
External 60x data from ROM
Figure 6-49. ROM Memory Interface Block Diagram
Figure 6-50 shows an example of a 16-Mbyte ROM system.
Address
(Processor or PCI)
Central Control Unit
External 60x data from ROM
ROM/Flash Memory Interface
ROM/Flash
Address
MUX
ROM/Flash
Control
ROM/Flash Memory Interface
ROM/Flash
Address
MUX
ROM/Flash
Control
Chapter 6. MPC8240 Memory Interface
ROM/Flash Interface Operation
ROM Memory Array
Row
AR[20:0]
Col
ROM/Flash Memory
RCS0
RCS1
FOE
Data Pins
MDH[0:31]
MDL[0:31]
ROM Memory Array
Row
AR[23:0]
Col
ROM/Flash Memory
RCS0
RCS1
RCS2
RCS3
Data Pins
MDH[0:31]
MDL[0:31]
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