Motorola MPC8240 User Manual page 43

microprocessors. This document is intended to help system and chipset developers
by providing a centralized reference source to identify the bus interface presented by
the 60x family of PowerPC microprocessors.
• PowerPC Microprocessor Family: The Programmer's Reference Guide:
MPCPRG/D (Motorola order #) is a concise reference that includes the register
summary, memory control model, exception vectors, and the PowerPC instruction
set.
• PowerPC Microprocessor Family: The Programmer's Pocket Reference Guide:
MPCPRGREF/D (Motorola order #)
This foldout card provides an overview of the PowerPC registers, instructions, and
exceptions for 32-bit implementations.
• Application notes—These short documents contain useful information about
specific design issues useful to programmers and engineers working with PowerPC
processors.
• Additional literature on PowerPC implementations is being released as new
processors become available. For a current list of PowerPC documentation, refer to
the world-wide web at http://www.mot.com/SPS/PowerPC/.
Conventions
This document uses the following notational conventions:
mnemonics
italics
0x0
0b0
rA, rB
rA|0
rD
frA, frB, frC
frD
REG[FIELD]
x
Instruction mnemonics are shown in lowercase bold.
Italics indicate variable command parameters, for example,
Book titles in text are set in italics.
Prefix to denote hexadecimal number
Prefix to denote binary number
Instruction syntax used to identify a source GPR
The contents of a specified GPR or the value 0.
Instruction syntax used to identify a destination GPR
Instruction syntax used to identify a source FPR
Instruction syntax used to identify a destination FPR
Abbreviations or acronyms for registers are shown in uppercase text.
Specific bits, fields, or ranges appear in brackets. For example,
MSR[LE] refers to the little-endian mode enable bit in the machine
state register.
In certain contexts, such as a signal encoding, this indicates a don't
care.
About This Book
Conventions
bcctr
x.
xliii