Dma Operation - Motorola MPC8240 User Manual

Local
PCI Memory
Memory
Offset
Offset
0x100 0x0_1100
0x104 0x0_1104
0x108 0x0_1108
0x110 0x0_1110
0x118 0x0_1118
0x120 0x0_1120
0x124 0x0_1124
0x200 0x0_1200
0x204 0x0_1204
0x208 0x0_1208
0x210 0x0_1210
0x218 0x0_1218
0x220 0x0_1220
0x224 0x0_1224

8.3 DMA Operation

The DMA controller operates in two modes—direct and chaining. In direct mode, the
software is responsible for initializing the source address register (SAR), destination
address register (DAR), and byte count register (BCR). In chaining mode, the software
must first build descriptors segments in local or remote memory. Then the current
descriptor address register (CDAR) is initialized to point to the first descriptor in memory.
In both modes, setting the channel start bit in the DMA mode register (DMR) starts the
DMA transfer.
The DMA controller supports misaligned transfers for both the source and destination
addresses. It gathers data beginning at the source address and aligns it accordingly before
sending it to the destination address. The DMA controller assumes that the source and
Table 8-1. DMA Register Summary
Register Name
DMA 0 mode register
(DMR)
DMA 0 status register
(DSR)
DMA 0 current descriptor
address register (CDAR)
DMA 0 source address
register (SAR)
DMA 0 destination address
register (DAR)
DMA 0 byte count register
(BCR)
DMA 0 next descriptor
address register (NDAR)
DMA 1 mode register
(DMR)
DMA 1 status register
(DSR)
DMA 1 current descriptor
address register (CDAR)
DMA 1 source address
register (SAR)
DMA 1 destination address
register (DAR)
DMA 1 byte count register
(BCR)
DMA 1 next descriptor
address register (NDAR)
Chapter 8. DMA Controller
Description
Allows software to setup up different DMA modes
and interrupt enables
Tracks DMA processes and errors
Contains the location of the current descriptor to
be loaded
Contains the source address from which data will
be read
Contains the destination address to which data
will be written
Contains the number of bytes to transfer
Contains the next descriptor address
Allows software to setup up different DMA modes
and interrupt enables
Tracks DMA processes and errors
Contains the location of the current descriptor to
be loaded
Contains the source address from which data will
be read
Contains the destination address to which data
will be written
Contains the number of bytes to transfer
Contains the next descriptor address
DMA Operation
8-3