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1.4
Bit Protection Scheme
The bit protection scheme prevents direct software writing of selected bits (i.e., protected
bits) by the PASSWD register. When the bit field MODE is 11
field PASS opens access to writing of all protected bits and writing 10101
PASS closes access to writing of all protected bits. Note that access is opened for
maximum 32 CCLKs if the "close access" password is not written. If "open access"
password is written again before the end of 32 CCLK cycles, there will be a recount of
32 CCLK cycles.
The bits or bit fields that are protected may differ for the XC800 derivatives.
PASSWD
Password Register
7
6
Field
MODE
PROTECT_S
PASS
User's Manual, V 0.1
5
4
PASS
wh
Bits
Type Description
[1:0]
rw
Bit-Protection Scheme Control bit
00
11
Others: Scheme Enabled
These two bits cannot be written directly. To change
the value between 11
must be written with 11000
MODE[1:0] be registered.
2
rh
Bit-Protection Signal Status bit
This bit shows the status of the protection.
0
1
[7:3]
wh
Password bits
The Bit-Protection Scheme recognizes only three
patterns.
11000
10011
10101
3
PROTECT
Scheme Disabled
Scheme Enabled (default)
and 00
B
Software is able to write to all protected bits.
Software is unable to write to any protected
bits.
Enables writing of the bit field MODE.
B
Opens access to writing of all protected bits.
B
Closes access to writing of all protected bits.
B
1-11
Fundamental Structure
, writing 10011
B
B
to the bit field
B
Reset Value: 07
2
1
MODE
_S
rh
rw
, the bit field PASS
B
, only then will the
B
XC800
to the bit
H
0
2005-01
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