Motorola MPC823e Reference Manual page 1171

Microprocessor for mobile computing
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addis
Assembler Syntax
BIT
0
1
2
FIELD
15
BIT
16
17
18
FIELD
Definition
Operation
Description
MOTOROLA
addis
rD,rA,SIMM)
3
4
5
6
7
19
20
21
22
23
SIMM
Add Immediate Shifted
if rA = 0 then rD " EXTS(SIMM || (16)0)
else rD " (rA) + EXTS(SIMM || (16)0)
The sum (rA|0) + (SIMM || 0x0000) is placed into rD.
The addis instruction is preferred for addition because it sets
few status bits. Note that addis uses the value 0, not the
contents of GPR0, if rA = 0.
Other registers altered:
None
Simplified mnemonics:
lis
rD,value
subis
rD,rA,value
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—addis
8
9
10
11
12
D
24
25
26
27
28
equivalent to
addis rD,0,value
equivalent to
addis rD,rA,–value
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
FORM
D
B-13

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