ST STM32F405 Reference Manual page 72

Memory and bus architecture
Addresses
0x0400 0000 - 0x07FF FFFF
0x0000 0000 -
(1)(2)
0x001F FFFF
1. When the FMC is remapped at address 0x0000 0000, only the first two regions of bank 1 memory controller (bank 1
NOR/PSRAM 1 and NOR/PSRAM 2) or SDRAM bank 1 can be remapped. In remap mode, the CPU can access the
external memory via ICode bus instead of System bus which boosts up the performance.
2. Even when aliased in the boot memory space, the related memory is still accessible at its original memory space.
72/1749
Table 4. Memory mapping vs. Boot mode/physical remap
in STM32F42xxx and STM32F43xxx (continued)
Boot/Remap in
main Flash memory
Reserved
Flash (2 MB) Aliased
Boot/Remap in
embedded SRAM
Reserved
SRAM1 (112 KB)
Aliased
RM0090 Rev 18
Boot/Remap in
Remap in FMC
System memory
FMC bank 1
Reserved NOR/PSRAM 2
(128 MB Aliased)
FMC bank 1
NOR/PSRAM 1
(128 MB Aliased)
System memory
(30 KB) Aliased
or FMC SDRAM
bank 1 (128 MB
RM0090
Aliased)