Table 46. Packing/Unpacking & Endian Behavior (Bit Pinc = Minc = 1) - ST STM32F405 Reference Manual

RM0090
Table 46. Packing/unpacking & endian behavior (bit PINC = MINC = 1)
Number
AHB
AHB of data
memory
peripheral items to
port
port width transfer
width
(NDT)
8 8 4
8 16 2
8 32 1
16 8 4
16 16 2
16 32 1
32 8 4
32 16 2
32 32 1
Note: Peripheral port may be the source or the destination (it could also be the memory source in
the case of memory-to-memory transfer).
PSIZE, MSIZE and NDT[15:0] have to be configured so as to ensure that the last transfer
will not be incomplete. This can occur when the data width of the peripheral port (PSIZE
bits) is lower than the data width of the memory port (MSIZE bits). This constraint is
summarized in
-
Memory Memory port
transfer address / byte
-
number lane
1
0x0 / B0[7:0]
2
0x1 / B1[7:0]
-
0x2 / B2[7:0]
3
0x3 / B3[7:0]
4
1
0x0 / B0[7:0]
2
0x1 / B1[7:0]
-
0x2 / B2[7:0]
3
0x3 / B3[7:0]
4
1
0x0 / B0[7:0]
2
0x1 / B1[7:0]
-
0x2 / B2[7:0]
3
0x3 / B3[7:0]
4
1 0x0 / B1|B0[15:0]
-
2 0x2 / B3|B2[15:0]
1
0x0 / B1|B0[15:0]
-
0x2 / B1|B0[15:0]
2
1
0x0 / B1|B0[15:0]
-
0x2 / B3|B2[15:0]
2
1 0x0 / B3|B2|B1|B0[31:0] 1
-
1
0x0 /B3|B2|B1|B0[31:0]
-
-
1 0x0 /B3|B2|B1|B0 [31:0] 1
Table 47.
RM0090 Rev 18
Peripheral port address / byte lane
Peripher
al
transfer
PINCOS = 1
number
1
0x0 / B0[7:0]
2
0x4 / B1[7:0]
0x8 / B2[7:0]
3
0xC / B3[7:0]
4
1
0x0 / B1|B0[15:0]
2 0x4 / B3|B2[15:0]
1
0x0 / B3|B2|B1|B0[31:0] 0x0 / B3|B2|B1|B0[31:0]
1
0x0 / B0[7:0]
2
0x4 / B1[7:0]
0x8 / B2[7:0]
3
0xC / B3[7:0]
4
1
0x0 / B1|B0[15:0]
0x4 / B3|B2[15:0]
2
1
0x0 / B3|B2|B1|B0[31:0] 0x0 / B3|B2|B1|B0[31:0]
0x0 / B0[7:0]
2
0x4 / B1[7:0]
0x8 / B2[7:0]
3
0xC / B3[7:0]
4
1
0x0 / B1|B0[15:0]
0x4 / B3|B2[15:0]
2
0x0 /B3|B2|B1|B0 [31:0] 0x0 / B3|B2|B1|B0[31:0]
DMA controller (DMA)
PINCOS = 0
0x0 / B0[7:0]
0x1 / B1[7:0]
0x2 / B2[7:0]
0x3 / B3[7:0]
0x0 / B1|B0[15:0]
0x2 / B3|B2[15:0]
0x0 / B0[7:0]
0x1 / B1[7:0]
0x2 / B2[7:0]
0x3 / B3[7:0]
0x0 / B1|B0[15:0]
0x2 / B3|B2[15:0]
0x0 / B0[7:0]
0x1 / B1[7:0]
0x2 / B2[7:0]
0x3 / B3[7:0]
0x0 / B1|B0[15:0]
0x2 / B3|B2[15:0]
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