ST STM32F405 Reference Manual page 576

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Advanced-control timers (TIM1 and TIM8)
Input capture mode
Bits 15:12 IC4F: Input capture 4 filter
Bits 11:10 IC4PSC: Input capture 4 prescaler
Bits 9:8 CC4S: Capture/Compare 4 selection
Note: CC4S bits are writable only when the channel is OFF (CC4E = '0' in TIMx_CCER).
Bits 7:4 IC3F: Input capture 3 filter
Bits 3:2 IC3PSC: Input capture 3 prescaler
Bits 1:0 CC3S: Capture/compare 3 selection
Note: CC3S bits are writable only when the channel is OFF (CC3E = '0' in TIMx_CCER).
17.4.9
TIM1 and TIM8 capture/compare enable register (TIMx_CCER)
Address offset: 0x20
Reset value: 0x0000
15
14
13
CC4P
CC4E
Reserved
rw
Bits 15:14 Reserved, must be kept at reset value.
Bit 13 CC4P: Capture/Compare 4 output polarity
Bit 12 CC4E: Capture/Compare 4 output enable
Bit 11 CC3NP: Capture/Compare 3 complementary output polarity
Bit 10 CC3NE: Capture/Compare 3 complementary output enable
Bit 9 CC3P: Capture/Compare 3 output polarity
Bit 8 CC3E: Capture/Compare 3 output enable
576/1749
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC4 channel is configured as output
01: CC4 channel is configured as input, IC4 is mapped on TI4
10: CC4 channel is configured as input, IC4 is mapped on TI3
11: CC4 channel is configured as input, IC4 is mapped on TRC. This mode is working only if
an internal trigger input is selected through TS bit (TIMx_SMCR register)
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC3 channel is configured as output
01: CC3 channel is configured as input, IC3 is mapped on TI3
10: CC3 channel is configured as input, IC3 is mapped on TI4
11: CC3 channel is configured as input, IC3 is mapped on TRC. This mode is working only if
an internal trigger input is selected through TS bit (TIMx_SMCR register)
12
11
10
9
CC3NP CC3NE
CC3P
rw
rw
rw
rw
refer to CC1P description
refer to CC1E description
refer to CC1NP description
refer to CC1NE description
refer to CC1P description
refer to CC1E description
8
7
6
CC3E
CC2NP CC2NE
rw
rw
rw
RM0090 Rev 18
5
4
3
2
CC2P
CC2E
CC1NP CC1NE
rw
rw
rw
rw
RM0090
1
0
CC1P
CC1E
rw
rw

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