Table 28. Stop Operating Modes (Stm32F42Xxx And Stm32F43Xxx) - ST STM32F405 Reference Manual

Power controller (PWR)

Table 28. Stop operating modes (STM32F42xxx and STM32F43xxx)

Voltage Regulator Mode
STOP MR
(Main Regulator)
STOP MR- FPD
Normal
STOP LP
mode
STOP LP-FPD
STOP UMR-
FPD
Under-
drive
Mode
STOP ULP-FPD
Entering Stop mode (STM32F42xxx and STM32F43xxx)
The Stop mode is entered according to
SLEEPDEEP bit in the Cortex
Refer to
When the microcontroller enters in Stop mode, the voltage scale 3 is automatically selected.
To further reduce power consumption in Stop mode, the internal voltage regulator can be put
in low voltage mode. This is configured by the LPDS, MRUDS, LPUDS and UDEN bits of
the PWR power control register (PWR_CR) for STM32F405xx/07xx and
STM32F415xx/17xx.
If Flash memory programming is ongoing, the Stop mode entry is delayed until the memory
access is finished.
If an access to the APB domain is ongoing, The Stop mode entry is delayed until the APB
access is finished.
If the Over-drive mode was enabled before entering Stop mode, it is automatically disabled
during when the Stop mode is activated.
134/1749
UDEN[1:0] MRUDS
bits bit
- 0
- 0
- 0
-
3 1
3
®
Table 29 for details on how to enter the Stop mode.
LPUDS LPDS
bit bit
- 0
- 0
0 1
- 0 1
- 0
- 1 1
Section : Entering low-power
-M4 with FPU System Control register is set.
RM0090 Rev 18
FPDS
Wakeup latency
bit
0 HSI RC startup time
HSI RC startup time +
1
Flash wakeup time from power-
down mode
HSI RC startup time +
0
regulator wakeup time from LP
mode
HSI RC startup time +
Flash wakeup time from power-
1 down mode +
regulator wakeup time from LP
mode
HSI RC startup time +
Flash wakeup time from power-
down mode +
-
Main regulator wakeup time from
under-drive mode + Core logic to
nominal mode
HSI RC startup time +
Flash wakeup time from power-
down mode +
-
regulator wakeup time from LP
under-drive mode + Core logic to
nominal mode
mode, when the
RM0090