ST STM32F405 Reference Manual page 502

LCD-TFT controller (LTDC)
16.7.14 LTDC Layerx Control Register (LTDC_LxCR) (where x=1..2)
Address offset: 0x84 + 0x80 x (Layerx -1), Layerx = 1 or 2
Reset value: 0x0000 0000
31 30 29 28
15 14 13 12
Bits 31:5 Reserved, must be kept at reset value
Bit 4 CLUTEN: Color Look-Up Table Enable
Bit 3 Reserved, must be kept at reset value
Bit 2 Reserved, must be kept at reset value
Bit 1 COLKEN: Color Keying Enable
Bit 0 LEN: Layer Enable
502/1749
27 26 25
11 10 9
Reserved
This bit is set and cleared by software.
0: Color Look-Up Table disable
1: Color Look-Up Table enable
The CLUT is only meaningful for L8, AL44 and AL88 pixel format. Refer to
Table (CLUT) on page 488
This bit is set and cleared by software.
0: Color Keying disable
1: Color Keying enable
This bit is set and cleared by software.
0: Layer disable
1: Layer enable
RM0090 Rev 18
24 23 22 21
Reserved
8 7 6 5
20 19 18
4 3 2
CLUTEN COLKEN
Reserved
rw
Color Look-Up
RM0090
17 16
1 0
LEN
rw rw