ST STM32F405 Reference Manual page 185

RM0090
Bit 18 USART3EN: USART3 clock enable
Bit 17 USART2EN: USART2 clock enable
Bit 16 Reserved, must be kept at reset value.
Bit 15 SPI3EN: SPI3 clock enable
Bit 14 SPI2EN: SPI2 clock enable
Bits 13:12 Reserved, must be kept at reset value.
Bit 11 WWDGEN: Window watchdog clock enable
Bit 10:9 Reserved, must be kept at reset value.
Bit 8 TIM14EN: TIM14 clock enable
Bit 7 TIM13EN: TIM13 clock enable
Bit 6 TIM12EN: TIM12 clock enable
Bit 5 TIM7EN: TIM7 clock enable
Bit 4 TIM6EN: TIM6 clock enable
Reset and clock control for STM32F42xxx and STM32F43xxx (RCC)
This bit is set and cleared by software.
0: USART3 clock disabled
1: USART3 clock enabled
This bit is set and cleared by software.
0: USART2 clock disabled
1: USART2 clock enabled
This bit is set and cleared by software.
0: SPI3 clock disabled
1: SPI3 clock enabled
This bit is set and cleared by software.
0: SPI2 clock disabled
1: SPI2 clock enabled
This bit is set and cleared by software.
0: Window watchdog clock disabled
1: Window watchdog clock enabled
This bit is set and cleared by software.
0: TIM14 clock disabled
1: TIM14 clock enabled
This bit is set and cleared by software.
0: TIM13 clock disabled
1: TIM13 clock enabled
This bit is set and cleared by software.
0: TIM12 clock disabled
1: TIM12 clock enabled
This bit is set and cleared by software.
0: TIM7 clock disabled
1: TIM7 clock enabled
This bit is set and cleared by software.
0: TIM6 clock disabled
1: TIM6 clock enabled
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