ST STM32F405 Reference Manual page 184

Reset and clock control for STM32F42xxx and STM32F43xxx (RCC)
Bit 31 UART8EN: UART8 clock enable
Bit 30 UART7EN: UART7 clock enable
Bit 29 DACEN: DAC interface clock enable
Bit 28 PWREN: Power interface clock enable
Bit 27 Reserved, must be kept at reset value.
Bit 26 CAN2EN: CAN 2 clock enable
Bit 25 CAN1EN: CAN 1 clock enable
Bit 24 Reserved, must be kept at reset value.
Bit 23 I2C3EN: I2C3 clock enable
Bit 22 I2C2EN: I2C2 clock enable
Bit 21 I2C1EN: I2C1 clock enable
Bit 20 UART5EN: UART5 clock enable
Bit 19 UART4EN: UART4 clock enable
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This bit is set and cleared by software.
0: UART8 clock disabled
1: UART8 clock enabled
This bit is set and cleared by software.
0: UART7 clock disabled
1: UART7 clock enabled
This bit is set and cleared by software.
0: DAC interface clock disabled
1: DAC interface clock enable
This bit is set and cleared by software.
0: Power interface clock disabled
1: Power interface clock enable
This bit is set and cleared by software.
0: CAN 2 clock disabled
1: CAN 2 clock enabled
This bit is set and cleared by software.
0: CAN 1 clock disabled
1: CAN 1 clock enabled
This bit is set and cleared by software.
0: I2C3 clock disabled
1: I2C3 clock enabled
This bit is set and cleared by software.
0: I2C2 clock disabled
1: I2C2 clock enabled
This bit is set and cleared by software.
0: I2C1 clock disabled
1: I2C1 clock enabled
This bit is set and cleared by software.
0: UART5 clock disabled
1: UART5 clock enabled
This bit is set and cleared by software.
0: UART4 clock disabled
1: UART4 clock enabled
RM0090 Rev 18
RM0090