Table 89. Lcd-Tft Pins And Signal Interface - ST STM32F405 Reference Manual

RM0090
16.3.3 LCD-TFT pins and signal interface
The Table below summarizes the LTDC signal interface:
LCD-TFT
signals
LCD_CLK
LCD_HSYNC
LCD_VSYNC
LCD_DE
LCD_R[7:0]
LCD_G[7:0]
LCD_B[7:0]
The LCD-TFT controller pins must be configured by the user application. The unused pins
can be used for other purposes.
For LTDC outputs up to 24-bit (RGB888), if less than 8bpp are used to output for example
RGB565 or RGB666 to interface on 16b-bit or 18-bit displays, the RGB display data lines
must be connected to the MSB of the LCD-TFT controller RGB data lines. As an example, in
the case of an LCD-TFT controller interfacing with a RGB565 16-bit display, the LCD display
R[4:0], G[5:0] and B[4:0] data lines pins must be connected to LCD-TFT controller
LCD_R[7:3], LCD_G[7:2] and LCD_B[7:3].
16.4 LTDC programmable parameters
The LCD-TFT controller provides flexible configurable parameters. It can be enabled or
disabled through the LTDC_GCR register.
16.4.1 LTDC Global configuration parameters
Synchronous Timings:
Figure 82
Timings Generator block presented in the block diagram
Horizontal and Vertical Synchronization timings panel signals, the Pixel Clock and the Data
Enable signals.

Table 89. LCD-TFT pins and signal interface

I/O
O Clock Output
O Horizontal Synchronization
O Vertical Synchronization
O Not Data Enable
O Data: 8-bit Red data
O Data: 8-bit Green data
O Data: 8-bit Blue data
presents the configurable timing parameters generated by the Synchronous
RM0090 Rev 18
LCD-TFT controller (LTDC)
Description
Figure 81. It generates the
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