Flash Option Control Register (Flash_Optcr); For Stm32F42Xxx And Stm32F43Xxx - ST STM32F405 Reference Manual

Embedded Flash memory interface
3.9.10

Flash option control register (FLASH_OPTCR)

for STM32F42xxx and STM32F43xxx

The FLASH_OPTCR register is used to modify the user option bytes.
Address offset: 0x14
Reset value: 0x0FFF AAED. The option bits are loaded with values from Flash memory at
reset release.
Access: no wait state when no Flash memory operation is ongoing, word, half-word and
byte access.
31 30 29 28
SPR
DB1M
MOD
Reserved
rw rw
15 14 13 12
rw rw rw rw
Bit 31 SPRMOD: Selection of protection mode for nWPRi bits
0: PCROP disabled. nWPRi bits used for Write protection on sector i.
1: PCROP enabled. nWPRi bits used for PCROP protection on sector i
Bit 30 DB1M: Dual-bank on 1 Mbyte Flash memory devices
0: 1 Mbyte single bank Flash memory (contiguous addresses in bank1)
1: 1 Mbyte dual bank Flash memory. The Flash memory is organized as two banks of
512 Kbytes each (see
(STM32F42xxx and STM32F43xxx)
organization (STM32F42xxx and
sector must be programmed (see
Note: If DB1M is set and an erase operation is performed on Bank 2 while the default sector
Bits 29:28 Reserved, must be kept cleared.
Bits 27:16 nWRP[11:0]: Not write protect
These bits contain the value of the write-protection and read-protection (PCROP) option bytes
for sectors 0 to 11 after reset. They can be written to program a new write-protect or PCROP
value into Flash memory.
If SPRMOD is reset:
0: Write protection active on sector i
1: Write protection not active on sector i
If SPRMOD is set:
0: PCROP protection not active on sector i
1: PCROP protection active on sector i
Bits 15:8 RDP[7:0]: Read protect
These bits contain the value of the read-protection option level after reset. They can be written
to program a new read protection value into Flash memory.
0xAA: Level 0, read protection not active
0xCC: Level 2, chip read protection active
Others: Level 1, read protection of memories active
108/1749
27 26 25
rw rw rw
11 10 9
RDP[7:0]
rw rw rw
Table 7: 1 Mbyte Flash memory single bank vs dual bank organization
number is selected (as an example, sector 8 is configured instead of sector 12), the
erase operation on Bank 2 sector is not performed.
24 23 22
nWRP[11:0]
rw rw rw
8 7 6
nRST_ nRST_ WDG_
STDBY STOP
rw rw rw
and Table 9: 1 Mbyte dual bank Flash memory
STM32F43xxx)). To perform an erase operation, the right
Table 7 for information on the sector numbering scheme).
RM0090 Rev 18
21 20 19 18
rw rw rw rw
5 4 3 2
BFB2 BOR_LEV
SW
rw rw rw rw
RM0090
17 16
rw rw
1 0
OPTST OPTLO
RT CK
rs rs