Figure 139. Counter Timing Diagram, Internal Clock Divided By 4; Figure 140. Counter Timing Diagram, Internal Clock Divided By N - ST STM32F405 Reference Manual

General-purpose timers (TIM2 to TIM5) RM0090

Figure 139. Counter timing diagram, internal clock divided by 4

CK_INT
CNT_EN
Timerclock = CK_CNT
Counter register
0035 0036 0000 0001
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)
MSv37301V1

Figure 140. Counter timing diagram, internal clock divided by N

CK_INT
Timerclock = CK_CNT
Counter register
1F 20 00
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)
MSv37302V1
594/1749 RM0090 Rev 18