ST STM32F405 Reference Manual page 827

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This register can be written only when ALRBWF is set to 1 in RTC_ISR, or in initialization

This register is write protected. The write access procedure is described in

write protection on page

RTC write protection register (RTC_WPR)

Address offset: 0x24

Backup domain reset value: 0x0000 0000

Bits 31:8 Reserved, must be kept at reset value.

Bits 7:0 KEY: Write protection key

This byte is written by software.

Reading this byte always returns 0x00.

RTC sub second register (RTC_SSR)

Address offset: 0x28

Backup domain reset value: 0x0000 0000

System reset: 0x0000 0000 when BYPSHAD = 0. Not affected when BYPSHAD = 1.

Bits 31:16 Reserved

Bits 15:0 SS: Sub second value

SS[15:0] is the value in the synchronous prescaler's counter. The fraction of a second is

given by the formula below:

Second fraction = ( PREDIV_S - SS ) / ( PREDIV_S + 1 )

Note: SS can be larger than PREDIV_S only after a shift operation. In that case, the correct

RTC register write protection

time/date is one second less than as indicated by RTC_TR/RTC_DR.

for a description of how to unlock RTC register write

RM0090 Rev 18

Real-time clock (RTC)

RTC register

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