Figure 248. Data Clock Timing Diagram - ST STM32F405 Reference Manual

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1. These timings are shown with the LSBFIRST bit reset in the SPI_CR1 register.

Data frame format

Data can be shifted out either MSB-first or LSB-first depending on the value of the

LSBFIRST bit in the SPI_CR1 Register.

Each data frame is 8 or 16 bits long depending on the size of the data programmed using

the DFF bit in the SPI_CR1 register. The selected data frame format is applicable for

transmission and/or reception.

Figure 248. Data clock timing diagram

Capture strobe

Capture strobe

RM0090 Rev 18

Serial peripheral interface (SPI)

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