ST STM32F405 Reference Manual page 819

RM0090
Bit 16 ADD1H: Add 1 hour (summer time change)
Bit 15 TSIE: Timestamp interrupt enable
Bit 14 WUTIE: Wakeup timer interrupt enable
Bit 13 ALRBIE: Alarm B interrupt enable
Bit 12 ALRAIE: Alarm A interrupt enable
Bit 11 TSE: Time stamp enable
Bit 10 WUTE: Wakeup timer enable
Note: When the wakeup timer is disabled, wait for WUTWF=1 before enabling it again.
Bit 9 ALRBE: Alarm B enable
Bit 8 ALRAE: Alarm A enable
Bit 7 DCE: Coarse digital calibration enable
Bit 6 FMT: Hour format
Bit 5 BYPSHAD: Bypass the shadow registers
Note: If the frequency of the APB1 clock is less than seven times the frequency of RTCCLK,
When this bit is set, 1 hour is added to the calendar time. This bit is always read as 0.
0: No effect
1: Adds 1 hour to the current time. This can be used for summer time change outside
initialization mode.
0: Timestamp Interrupt disable
1: Timestamp Interrupt enable
0: Wakeup timer interrupt disabled
1: Wakeup timer interrupt enabled
0: Alarm B Interrupt disable
1: Alarm B Interrupt enable
0: Alarm A interrupt disabled
1: Alarm A interrupt enabled
0: Time stamp disable
1: Time stamp enable
0: Wakeup timer disabled
1: Wakeup timer enabled
0: Alarm B disabled
1: Alarm B enabled
0: Alarm A disabled
1: Alarm A enabled
0: Digital calibration disabled
1: Digital calibration enabled
PREDIV_A must be 6 or greater
0: 24 hour/day format
1: AM/PM hour format
0: Calendar values (when reading from RTC_SSR, RTC_TR, and RTC_DR) are taken from
the shadow registers, which are updated once every two RTCCLK cycles.
1: Calendar values (when reading from RTC_SSR, RTC_TR, and RTC_DR) are taken
directly from the calendar counters.
BYPSHAD must be set to '1'.
RM0090 Rev 18
Real-time clock (RTC)
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