Figure 293. Tristate On Output Data Line In A Protocol Like I2S - ST STM32F405 Reference Manual

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Serial audio interface (SAI)

Figure 293. Tristate on output data line in a protocol like I2S

If the TRIS bit in the SAI_xCR2 register is cleared, all the High impedance states on the SD

output line on

The SAI embeds some error flags:

FIFO overrun/underrun (OVRUDR)

The FIFO Overrun/Underrun bit is called OVRUDR in the SAI_xSR register.

The overrun or underrun errors occupy the same bit since an audio block can be either

receiver or transmitter and each audio block in an SAI has its own SAI_xSR register.

When the audio block is configured as receiver, an overrun condition may appear if data is

received in an audio frame when the FIFO is full and is not able to store the received data.

In this case, the received data is lost, the flag OVRUDR in the SAI_xSR register is set and

an interrupt is generated if bit OVRUDRIE is set in the SAI_xIM register. The slot number

from which the overrun occurs, is stored internally. No more data will be stored into the FIFO

until it becomes free to store new data. When the FIFO has at least one data free, the SAI

audio block receiver will store new data (from new audio frame) from the slot number which

Slot size = data size

Slot size > data size

FIFO overrun/underrun,

Anticipated frame synchronization detection,

Late frame synchronization detection,

Codec not ready (AC'97 exclusively),

Wrong clock configuration in master mode.

are replaced by a drive with a value of 0.

RM0090 Rev 18

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