Table 111. Number Of Cycles Required To Process Each 128-Bit Block; (Stm32F415/417Xx); (Stm32F43Xxx) - ST STM32F405 Reference Manual

Cryptographic processor (CRYP)
23 Cryptographic processor (CRYP)
This section applies to STM32F415/417xx and STM32F43xxx devices.
23.1 CRYP introduction
The cryptographic processor can be used to both encipher and decipher data using the
DES, Triple-DES or AES (128, 192, or 256) algorithms. It is a fully compliant implementation
of the following standards:
•
The data encryption standard (DES) and Triple-DES (TDES) as defined by Federal
Information Processing Standards Publication (FIPS PUB 46-3, 1999 October 25). It
follows the American National Standards Institute (ANSI) X9.52 standard.
•
The advanced encryption standard (AES) as defined by Federal Information
Processing Standards Publication (FIPS PUB 197, 2001 November 26)
The CRYP processor performs data encryption and decryption using DES and TDES
algorithms in Electronic codebook (ECB) or Cipher block chaining (CBC) mode.
The CRYP peripheral is a 32-bit AHB2 peripheral. It supports DMA transfer for incoming and
processed data, and has input and output FIFOs (each 8 words deep).
23.2 CRYP main features
•
Suitable for AES, DES and TDES enciphering and deciphering operations
•
AES
–
–
–

Table 111. Number of cycles required to process each 128-bit block

Algorithm / Key size
128b
192b
256b
Table 112. Number of cycles required to process each 128-bit block
Algorithm /
ECB
Key size
128b 14
720/1749
Supports the ECB, CBC, CTR, CCM and GCM chaining algorithms (CCM and
GCM are available on STM32F42xxx and STM32F43xxx only)
Supports 128-, 192- and 256-bit keys
4 × 32-bit initialization vectors (IV) used in the CBC, CTR, CCM and GCM modes

(STM32F415/417xx)

CBC CTR
Init
14 14 24
ECB
14
16
18

(STM32F43xxx)

GCM
Header Payload
10 14
RM0090 Rev 18
CBC
14
16
18
CCM
Tag Init Header Payload
14 12 14
RM0090
CTR
14
16
18
Tag
25 14