Table 72. Adc Register Map And Reset Values For Each Adc - ST STM32F405 Reference Manual

RM0090

Table 72. ADC register map and reset values for each ADC

Offset Register
ADC_SR
0x00
Reset value
ADC_CR1
0x04
Reset value
Re
se
ADC_CR2
rv
0x08
ed
Reset value
ADC_SMPR1
0x0C
Reset value 0
ADC_SMPR2
0x10
Reset value 0
ADC_JOFR1
0x14
Reset value
ADC_JOFR2
0x18
Reset value
ADC_JOFR3
0x1C
Reset value
ADC_JOFR4
0x20
Reset value
ADC_HTR
0x24
Reset value
ADC_LTR
0x28
Reset value
ADC_SQR1
0x2C
Reset value
ADC_SQR2
0x30
Reset value
ADC_SQR3
0x34
Reset value
ADC_JSQR
0x38
Reset value
ADC_JDR1
0x3C
Reset value
ADC_JDR2
0x40
Reset value
ADC_JDR3
0x44
Reset value
ADC_JDR4
0x48
Reset value
ADC_DR
0x4C
Reset value
Reserved
0 0 0 0
Re
se
EXTSEL [3:0]
rv
ed
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
L[3:0]
Reserved
0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
DISC
NUM [2:0]
Reserved
0 0 0
JEXTSEL
[3:0]
Reserved
0 0 0 0 0 0 0
Sample time bits SMPx_x
0 0 0 0 0 0 0 0 0
Sample time bits SMPx_x
0 0 0 0 0 0 0 0 0
Regular channel sequence SQx_x bits
0 0 0 0 0 0 0 0 0
Regular channel sequence SQx_x bits
0 0 0 0 0 0 0 0 0
Regular channel sequence SQx_x bits
0 0 0 0 0 0 0 0 0
JL[1:0] Injected channel sequence JSQx_x bits
0 0 0 0 0 0 0 0
0 0
0 0
0 0
0 0
0 0
RM0090 Rev 18
Analog-to-digital converter (ADC)
0
0 0 0 0 0 0 0 0 0
Reserved
0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
JOFFSET1[11:0]
0 0 0 0 0 0 0
JOFFSET2[11:0]
0 0 0 0 0 0 0
JOFFSET3[11:0]
0 0 0 0 0 0 0
JOFFSET4[11:0]
0 0 0 0 0 0 0
HT[11:0]
1 1 1 1 1 1 1
LT[11:0]
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
JDATA[15:0]
0 0 0 0 0 0 0 0 0
JDATA[15:0]
0 0 0 0 0 0 0 0 0
JDATA[15:0]
0 0 0 0 0 0 0 0 0
JDATA[15:0]
0 0 0 0 0 0 0 0 0
Regular DATA[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0
AWDCH[4:0]
0 0 0 0 0
0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
1 1 1 1 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
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