LCD-TFT controller (LTDC)
Offset
Register
LTDC_L2CFBLNR
0x0134
Reset value
LTDC_L2CLUTWR
0x0144
Reset value
514/1749
Table 92. LTDC register map and reset values (continued)
CLUTADD[7:0]
0
0
0
0
0
0
0
0
0
Reserved
RED[7:0]
0
0
0
0
0
0
0
0
0
RM0090 Rev 18
CFBLNBR[10:0]
0
0
0
0
0
0
GREEN[7:0]
0
0
0
0
0
0
0
0
0
RM0090
0
0
0
0
0
BLUE[7:0]
0
0
0
0
0
Need help?
Do you have a question about the STM32F405 and is the answer not in the manual?