ST STM32F405 Reference Manual page 112

Embedded Flash memory interface
Table 20. Flash register map and reset values (STM32F42xxx and STM32F43xxx) (continued)
Offset Register
FLASH_CR
0x10
Reset value
FLASH_OPTCR
0x14
Reset value
FLASH_
OPTCR1
0x18
Reset value
112/1749
Reserved
1 0
nWRP[11:0]
0 0 1 1 1 1 1
nWRP[11:0]
1 1 1 1 1
Reserved
0 0
1 1 1 1 1 1 1 1 0 1
1 1 1 1 1 1 1
RM0090 Rev 18
SNB[4:0]
Reserved
0 0 0 0 0
RDP[7:0]
0 1 0 1 0 1 1 1
Reserved
RM0090
0 0 0 0 0
0 1 1 0 1