General-purpose timers (TIM2 to TIM5)
Counter clock = CK_CNT = CK_PSC
External clock source mode 2
This mode is selected by writing ECE=1 in the TIMx_SMCR register.
The counter can count at each rising or falling edge on the external trigger input ETR.
Figure 157
ETR pin
For example, to configure the upcounter to count each 2 rising edges on ETR, use the
following procedure:
1.
As no filter is needed in this example, write ETF[3:0]=0000 in the TIMx_SMCR register.
2.
Set the prescaler by writing ETPS[1:0]=01 in the TIMx_SMCR register
3.
Select rising edge detection on the ETR pin by writing ETP=0 in the TIMx_SMCR
register
4.
Enable external clock mode 2 by writing ECE=1 in the TIMx_SMCR register.
5.
Enable the counter by writing CEN=1 in the TIMx_CR1 register.
The counter counts once each 2 ETR rising edges.
604/1749
Figure 156. Control circuit in external clock mode 1
TI2
CNT_EN
Counter register
TIF
gives an overview of the external trigger input block.
Figure 157. External trigger input block
ETR
0
Divider
/1, /2, /4, /8
1
ETP
ETPS[1:0]
TIMx_SMCR
TIMx_SMCR
RM0090 Rev 18
34
Write TIF=0
or
ETRP
Filter
downcounter
CK_INT
ETF[3:0]
(internal clock)
TIMx_SMCR
35
TI2F
or
TI1F
or
Encoder
mode
TRGI
External clock
mode 1
ETRF
External clock
mode 2
CK_INT
Internal clock
mode
ECE
SMS[2:0]
TIMx_SMCR
RM0090
36
MS31087V2
CK_PSC
MS37365V1
Need help?
Do you have a question about the STM32F405 and is the answer not in the manual?