ST STM32F405 Reference Manual page 234

Reset and clock control for STM32F405xx/07xx and STM32F415xx/17xx(RCC)
Bit 22 DMA2RST: DMA2 reset
Bit 21 DMA1RST: DMA1 reset
Bits 20:13 Reserved, must be kept at reset value.
Bit 12 CRCRST: CRC reset
Bits 11:9 Reserved, must be kept at reset value.
Bit 8 GPIOIRST: IO port I reset
Bit 7 GPIOHRST: IO port H reset
Bits 6 GPIOGRST: IO port G reset
Bit 5 GPIOFRST: IO port F reset
Bit 4 GPIOERST: IO port E reset
Bit 3 GPIODRST: IO port D reset
234/1749
Set and cleared by software.
0: does not reset DMA2
1: resets DMA2
Set and cleared by software.
0: does not reset DMA1
1: resets DMA1
Set and cleared by software.
0: does not reset CRC
1: resets CRC
Set and cleared by software.
0: does not reset IO port I
1: resets IO port I
Set and cleared by software.
0: does not reset IO port H
1: resets IO port H
Set and cleared by software.
0: does not reset IO port G
1: resets IO port G
Set and cleared by software.
0: does not reset IO port F
1: resets IO port F
Set and cleared by software.
0: does not reset IO port E
1: resets IO port E
Set and cleared by software.
0: does not reset IO port D
1: resets IO port D
RM0090 Rev 18
RM0090