ST STM32F405 Reference Manual page 475

RM0090
15.8.7 DCMI embedded synchronization code register (DCMI_ESCR)
Address offset: 0x18
Reset value: 0x0000 0x0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
FEC
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:24 FEC: Frame end delimiter code
Bits 23:16 LEC: Line end delimiter code
Bits 15:8 LSC: Line start delimiter code
LEC
This byte specifies the code of the frame end delimiter. The code consists of 4
bytes in the form of 0xFF, 0x00, 0x00, FEC.
If FEC is programmed to 0xFF, all the unused codes (0xFF0000XY) are
interpreted as frame end delimiters.
This byte specifies the code of the line end delimiter. The code consists of 4
bytes in the form of 0xFF, 0x00, 0x00, LEC.
This byte specifies the code of the line start delimiter. The code consists of 4
bytes in the form of 0xFF, 0x00, 0x00, LSC.
Bits 7:0 FSC: Frame start delimiter code
This byte specifies the code of the frame start delimiter. The code consists of 4
bytes in the form of 0xFF, 0x00, 0x00, FSC.
If FSC is programmed to 0xFF, no frame start delimiter is detected. But, the 1
occurrence of LSC after an FEC code will be interpreted as a start of frame
delimiter.
LSC
RM0090 Rev 18
Digital camera interface (DCMI)
9 8 7 6 5 4
FSC
3 2 1 0
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