ST STM32F405 Reference Manual page 67

RM0090
Table 1. STM32F4xx register boundary addresses (continued)
Boundary address
0x4000 7400 - 0x4000 77FF
0x4000 7000 - 0x4000 73FF
0x4000 6800 - 0x4000 6BFF
0x4000 6400 - 0x4000 67FF
0x4000 5C00 - 0x4000 5FFF
0x4000 5800 - 0x4000 5BFF
0x4000 5400 - 0x4000 57FF
0x4000 5000 - 0x4000 53FF
0x4000 4C00 - 0x4000 4FFF
0x4000 4800 - 0x4000 4BFF
0x4000 4400 - 0x4000 47FF
0x4000 4000 - 0x4000 43FF
0x4000 3C00 - 0x4000 3FFF
0x4000 3800 - 0x4000 3BFF
0x4000 3400 - 0x4000 37FF
0x4000 3000 - 0x4000 33FF
0x4000 2C00 - 0x4000 2FFF
0x4000 2800 - 0x4000 2BFF
0x4000 2000 - 0x4000 23FF
0x4000 1C00 - 0x4000 1FFF
0x4000 1800 - 0x4000 1BFF
0x4000 1400 - 0x4000 17FF
0x4000 1000 - 0x4000 13FF
0x4000 0C00 - 0x4000 0FFF
0x4000 0800 - 0x4000 0BFF
0x4000 0400 - 0x4000 07FF
0x4000 0000 - 0x4000 03FF
Peripheral
DAC
PWR
CAN2
CAN1
I2C3
I2C2
I2C1
UART5
UART4
USART3
USART2
I2S3ext
SPI3 / I2S3
SPI2 / I2S2
APB1
I2S2ext
IWDG
WWDG
RTC & BKP Registers
TIM14
TIM13
TIM12
TIM7
TIM6
TIM5
TIM4
TIM3
TIM2
RM0090 Rev 18
Bus
Section 14.5.15: DAC register map on page 453
Section 5.6: PWR register map on page 149
Section 32.9.5: bxCAN register map on page 1118
Section 27.6.11: I2C register map on page 872
Section 30.6.8: USART register map on page 1018
Section 28.5.10: SPI register map on page 925
Section 21.4.5: IWDG register map on page 712
Section 22.6.4: WWDG register map on page 719
Section 26.6.21: RTC register map on page 836
Section 19.5.12: TIM10/11/13/14 register map on
page 694
Section 19.4.13: TIM9/12 register map on
page 684
Section 20.4.9: TIM6 and TIM7 register map on
page 707
Section 18.4.21: TIMx register map on page 648
Memory and bus architecture
Register map
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