ST STM32F405 Reference Manual page 179

RM0090
Bit 15 Reserved, must be kept at reset value.
Bit 14 SYSCFGRST: System configuration controller reset
Bit 13 SPI4RST: SPI4 reset
Bit 12 SPI1RST: SPI1 reset
Bit 11 SDIORST: SDIO reset
Bits 10:9 Reserved, must be kept at reset value.
Bit 8 ADCRST: ADC interface reset (common to all ADCs)
Bits 7:6 Reserved, must be kept at reset value.
Bit 5 USART6RST: USART6 reset
Bit 4
Bits 3:2 Reserved, must be kept at reset value.
Bit 1 TIM8RST: TIM8 reset
Bit 0 TIM1RST: TIM1 reset
Reset and clock control for STM32F42xxx and STM32F43xxx (RCC)
This bit is set and cleared by software.
0: does not reset the System configuration controller
1: resets the System configuration controller
This bit is set and cleared by software.
0: does not reset SPI4
1: resets SPI4
This bit is set and cleared by software.
0: does not reset SPI1
1: resets SPI1
This bit is set and cleared by software.
0: does not reset the SDIO module
1: resets the SDIO module
This bit is set and cleared by software.
0: does not reset the ADC interface
1: resets the ADC interface
This bit is set and cleared by software.
0: does not reset USART6
1: resets USART6
USART1RST: USART1 reset
This bit is set and cleared by software.
0: does not reset USART1
1: resets USART1
This bit is set and cleared by software.
0: does not reset TIM8
1: resets TIM8
This bit is set and cleared by software.
0: does not reset TIM1
1: resets TIM1
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