Operation Of 16-Bit Reload Timer; Fig. 10.8 Setting Of Internal Clock Mode; Fig. 10.9 Setting Of Event Counter Mode - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

10.6 Operation of 16-bit Reload Timer

The setting of the 16-bit reload timer and the operation state of the counter are explained.
n Setting of 16-bit reload timer
• Setting of internal clock mode
To operate the 16-bit reload timer as the interval timer, the following setting is required.
bit 15 bit 14 bit 13
TMCSR - - -
TMRLR
¥: Used bit
1: 1 set
• Setting of event count mode
To operate the 16-bit reload timer as the event counter, the following setting is required.
bit 15 bit 14 bit 13 bit 12
TMCSR0/1 — —
TMRLR0/1
DDR1
DDR0
¥: Used bit
1 : 1 set
∆ : 0 set to bit corresponding to pin to use
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
bit 12 bit 11 bit 10 bit 9
- CSL1 CSL0 MOD2 MOD1 MOD0 OUTE OUTL RELD
Except for 11
Initial value of counter (reload value)set

Fig. 10.8 Setting of Internal Clock Mode

bit 11 bit 10
— — CSL1 CSL0 MOD2 MOD1 MOD0 OUTE OUTL RELD INTE
1 1
Initial value of counter (reload value)set

Fig. 10.9 Setting of Event Counter Mode

bit 8 bit 7 bit 6
¥ ¥ ¥ ¥
bit 9 bit 8 bit 7 bit 6
¥ ¥ ¥ ¥
∆
10-16
bit 5 bit 4 bit 3 bit 2
INTE UF
¥ ¥ ¥ ¥
bit 5 bit 4 bit 3 bit 2
UF
¥ ¥ ¥ ¥
∆
bit 1 bit 0
CNTE TRG
¥
1
bit 1 bit 0
CNTE TRG
¥
1