Analog Devices Advantiv ADV7604 Hardware Manual page 95

• The internal E-EDID is enabled for port A if an HDMI Tx tries to access the EDID through
the DDC bus of port A. The EDID/Repeater controller also sets
to 1.
• The internal E-EDID is enabled for port B if an HDMI Tx tries to access the EDID through
the DDC bus of port B. The EDID/Repeater controller also sets
1.
• The internal E-EDID is enabled for port C if an HDMI Tx tries to access the EDID through
the DDC bus of port C. The EDID/Repeater controller also sets
1.
• The internal E-EDID is enabled for port D if an HDMI Tx tries to access the EDID through
the DDC bus of port D and if the SHARED_EDID pin is asserted high. The EDID/Repeater
controller also sets
7.3.1.1 5 V Supply
The ADV7604 can receive its power from the +5 V power signal line of one of the connected HDMI
cable(s) and enter into power-down mode 0 (refer to Section 3.2.1). This requirement dictates that
the ADV7604 specific supplies are capable of taking their input from either the generic power supply
or the +5 V power signal line of the four input HDMI ports.
Special care should be taken to ensure the generic power supply does not supply power back onto the
+5 V power signal lines in normal operation and that power is only used from the +5 V power signal
lines when the generic power supply is not available.
7.3.1.2 Power-down Pins
The ADV7604 features a hardware pin control that can be used to configure the ADV7604 into
power-down mode 0. This feature is designed to support power-down mode 0 when there is no
system power available (refer to Section 3.2.1). This is achieved by providing the PWRDNB pin
with a voltage, tapped from either of the ADV7604 specific supplies to power the part in normal or
power-down mode 0 when no system power is available (refer to
When power-down mode 0 is initiated via the power-down pin, the internal E-EDID is automatically
configured and the part loads its internal E-EDID with the information in the SPI PROM and internal
EDID is enabled on all ports.
Notes:
• The PWRDNB pin must not be pulled high when the part is powered from the cable supply.
• In order to use this feature, the PWRDNB pin must also be configured appropriately (refer to
Figure 4 and Figure
Rev. F August 2010
EDID_D_ENABLE_CPU
5).
95
EDID_A_ENABLE_CPU
EDID_B_ENABLE_CPU
EDID_C_ENABLE_CPU
to 1.
Figure 4).
ADV7604
to
to