6.6.5 Trilevel Slicers
The ADV7604 has eight trilevel slicers, as shown in
operating in two modes. The first mode is bilevel mode where the input signal can be sliced at a
single voltage level to determine what information is being sent (refer to
is trilevel mode. This mode can be used to detect trilevel signals that are present from inputs such as
D-terminal connectors (refer to
All levels are programmable. The output from these slicers is available via readback registers. The
output from these slicers are also sent to a digital processor in the AFE that generates a system
interrupt if any inputs to TRI 1-8 change state. All interrupts can be enabled and serviced via I
There is also the option of driving a SCART fast blank signal to a digital pad. This will be the output
of the upper comparator of the chosen input, level shifted to 3.3 V (that is, the IO supply), and driven
out of the FB_OUT pin, utilizing the FB_OUT_EN feature of the ADV7604. (Refer to
FB_OUTPUT_EN, AFE Map, Address 0x14, [7]
Function
FB_OUTPUT_EN
0
1
FB_SELECT[2:0], AFE Map, Address 0x14, [2:0]
This routes the signal on the TRI 1-8 pins to the FB_OUT pin.
Function
FB_OUTPUT_EN
000
001
010
011
100
101
110
111
Rev. F August 2010
Table
11) and SCART connectors.
Description
FB_OUT pin disabled
Output from TRI1-8 mux routed to FB_OUT pin
Description
TRI1 to FB_OUT pin
TRI2 to FB_OUT pin
TRI3 to FB_OUT pin
TRI4 to FB_OUT pin
TRI5 to FB_OUT pin
TRI6 to FB_OUT pin
TRI7 to FB_OUT pin
TRI8 to FB_OUT pin
77
Figure
17. Each trilevel slicer is capable of
Table
ADV7604
12). The second mode
2
C.
Figure
17.)
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