Pixel Port Configuration; Llc Control; Cp Pixel Port Output Modes; Figure 7: Spreadsheet Screen Shot - Analog Devices Advantiv ADV7604 Hardware Manual

5 Pixel Port Configuration

The ADV7604 has a very flexible pixel port, which can be configured in a variety of formats to
accommodate downstream ICs. The ADV7604 can provide output modes up to 36 bits.
This section details the controls required to configure the ADV7604 pixel port. A spreadsheet tool,
the ADV7604-output-pixel-port-mapping.xls, can generate the pinout for all combinations of pixel
port configuration controls. Refer to this spreadsheet for a full overview of the available output
formats. Figure 7 provides a screen shot of the spreadsheet.
5.1

LLC Control

Basic controls for the output line locked clock (LLC) are
be used to invert the LLC polarity or tristate the output.
Controls also exist to skew the LLC versus the output data to achieve suitable setup and hold times
for any back end device. To achieve this, the LLC mux must be set to select the DLL clock, and the
DLL phase is then adjusted. The controls for this are
LLC_DLL_PHASE[4:0].
5.2

CP Pixel Port Output Modes

The pixel port output format of the ADV7604 is primarily controlled by
in the IO Map, register 0x03. The eight bits of
Rev. F August 2010

Figure 7: Spreadsheet Screen Shot

LLC_DLL_EN, LLC_DLL_MUX,
OP_FORMAT_SEL
57
INV_LLC_POL and TRI_LLC, which can
OP_FORMAT_SEL[7:0]
can be broken down into three
ADV7604
and