6.5
Synchronization Strippers
The ADV7604 has two synchronization stripper blocks, which are placed before the synchronization
processing sections, as shown in
reliable synchronization signal to the STDI and SSPD circuits in the component processor so that a
robust identification of the standard is made. A second synchronization stripper is provided to allow
the processing of a second or, possibly, a third channel.
A more in depth picture of Sync Stripper 1 is shown in
Stripper 2.
SYNC1
SYNC2
SYNC3
SYNC4
6.5.1 Synchronization Filter Stage
There are two synchronization strippers in the ADV7604 similar to that shown in
the four SYNC pins; SYNC 1, SYNC 2, SYNC3, or SYNC4 can be routed to the filter stage.
SYNC1_FILTER_SEL[1:0], Selects the clamp Filter characteristic on Sync Stripper 1, AFE
Map, Address 0x15, [3:2]
Function
SYNC1_FILTER_SEL
[1:0]
00
01
10
11
Rev. F August 2010
Figure 13.
The purpose of a synchronization stripper is to provide a
CLAMP
CONTROL
00
01
10
11
0
1
EMB_SYNC_SEL_MAN_EN
BASED ON
EMB_SYNC_1_SEL_MAN[1:0]
AIN_SEL[2:0]
CLAMP
CONTROL
00
01
10
11
0
1
EMB_SYNC_SEL_MAN_EN
BASED ON
EMB_SYNC_2_SEL_MAN[1:0]
AIN_SEL[2:0]
Figure 14: Synchronization Stripper Circuit
Description
No filter
Synchronization pulse width > 250 ns
Synchronization pulse width > 1 µs
Synchronization pulse width > 2.5 µs
Figure 14.
The circuit is duplicated for Sync
SYNC1_FILTER_SEL[1:0]
+
-
SLICE_LEVEL[4:0]
SYNC2_FILTER_SEL[1:0]
+
-
EMB_SYNC_SEL_2
SLICE_LEVEL[4:0]
73
EMBEDDED SYNC
EMB_SYNC_SEL_1
MUX
EMBEDDED SYNC
MUX
Figure
14. Any of
ADV7604
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