10.15 Auto Graphics Mode
Auto graphics mode is designed to allow the user to configure the ADV7604 to accept an input
format not shown in
Table 3
only to graphics input, it can also be used to support component video input.
10.15.1 Primary Auto Graphics Controls
The user must provide the following key parameters to enable the ADV7604 to sample correctly the
incoming video signal:
•
PLL_DIV_MAN_EN
This bit must be set to allow a user programmable PLL divide ratio to be used.
•
PLL_DIV_RATIO
The PLL divide ratio is equal to the number of samples per line. The ADV7604 multiplies the
incoming HSync frequency by the PLL divide ratio to generate the sampling clock.
•
CH1_FR_LL / CH2_FR_LL
CH1_FR_LL / CH2_FR_LL
actual line length is different from the expected line length by more than a programmable
threshold, the decoder will free run.
•
CP_LCOUNT_MAX/CH2_FR_FIELD_LENGTH [10:0]/INTERLACED
CP_LCOUNT_MAX
lines per frame. If the actual number of lines per frame is different from the expected number
by more than a programmable threshold, the decoder will free run.
set to 1 if the processed video is interlaced and set to 0 otherwise.
In auto graphics mode, it is assumed that embedded time codes are not required, and are disabled by
default – output timing uses the HS and VS pins. Data blanking during the horizontal
synchronization period and vertical synchronization period is also disabled. To enable embedded
time codes and/or data blanking,
control over time code insertion and data blanking is controlled by
DATA_BLANK_EN.
In the event that it is required to insert time codes and/or blank the data, the ADV7604 cannot
determine the start and end of active video on each horizontal line, nor the start and end of the VBI
region.
The following three options are available to handle time code insertion.
1. AV_POS_SEL , CP Map, Address 0x7B, [2] = 0
EAV/SAV and data blanking are based on the HSync and VSync edges. Only data in the HSync
and VSync areas will be blanked.
Rev. F August 2010
with the minimum amount of effort. Auto graphics mode is not limited
specifies the expected line length of the incoming video. If the
and
CH2_FR_FIELD_LENGTH [10:0]
GR_AV_BL_EN
308
specify the expected number of
should be set to 1. With this bit set, individual
AVCODE_INSERT_EN
ADV7604
INTERLACED
should be
and
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