Structure Of Internal E-Edid Of Ports B, C, And D; Figure 24: Port B E-Edid Structure And Mapping For Spa Located In Edid Block 1 - Analog Devices Advantiv ADV7604 Hardware Manual

7.4.3

Structure of Internal E-EDID of Ports B, C, and D

This section describes the structure of the internal E-EDID accessible through the DDC bus of port
B. The same description applies for the structure and configuration of the internal E-EDID accessed
through ports C and D.
The internal E-EDID is enabled for ports B by setting the
the internal E-EDID that is accessed on the DDC bus of port B corresponds to the data image
contained in the internal EDID RAM except for the SPA, SPA location, and the checksum of the
EDID block where the SPA is located.
The structure of the internal E-EDID image for port B is shown in the following figures:
•
Figure 24 − SPA located in E-EDID block 1
•
Figure 25 − SPA located in E-EDID block 2
•
Figure 26 − SPA located in E-EDID block 3
Port B E-EDID Structure
0x1FF Block 3 Checksum
Block 3
0x180
0x17F
Block 2 Checksum
Block 2
0x100
0xFF
Block 1 Checksum
Block 1
0x80
Block 0 Checksum
0x7F
Block 0
0x00

Figure 24: Port B E-EDID Structure and Mapping for SPA Located in EDID Block 1

Rev. F August 2010
0x1FE
0x17E
0x100
0xFF PORT_B_CHECKSUM[7:0]
0xFE
SP A_LOCATION[8:0]+2
SP A_PORT_B[15:0]
0x80
0x7E
0x00
EDID_B_ENABLE
0x1FF
Internal EDID RAM
REPEATER MAP ,Reg 0x70,Reg 0x71
0xFE
Internal EDID RAM
REPE ATER MAP ,Reg 0x70,Reg 0x71
SP A_LOCATION[8:0]-1
0x7F
Internal EDID RAM
102
ADV7604
bit to 1. The image of