Interrupt Status Clear Register Details; C Readback Egisters; Teletext - Analog Devices Advantiv ADV7604 Hardware Manual

11.10.3 Interrupt Status Clear Register Details

CCAP_AVL_CLR , IO Map, Address 0x53, [0]
Function
CCAP_AVL_CLR
0
1
CGMS_WSS_AVL_CLR , IO Map, Address 0x53, [2]
Function
CGMS_WSS_AVL_CLR
0
1
GS_PDC_VPS_UTC_AVL_CLR , IO Map, Address 0x53, [4]
Function
GS_PDC_VPS_UTC_AV
L_CLR
0
1
VITC_AVL_CLR , IO Map, Address 0x53, [6]
Function
VITC_AVL_CLR
0
1
2
11.11 I C Readback Registers

11.11.1 Teletext

Since Teletext is a high data rate standard, decoded bytes can be read back through ancillary data.
The STATUS_TTXT bit is provided in I
detected Teletext. Note that the STATUS_TTXT bit is a plain status bit and does not use the protocol
identified in Section 11.9.
STATUS_TTXT, VDP Map, Address 0x40, [7], Read only
Function
STATUS_TTXT
0
1
Rev. F August 2010
Description
Not necessary to write 0 to this bit as it is a self clearing bit
Clears CCAP_AVL_CLR Interrupt Status register bit
Description
Not necessary to write 0 to this bit as it is a self clearing bit
Clears CGMS_WSS_AVL_ST Interrupt Status register bit
Description
Not necessary to write 0 to this bit as it is a self clearing bit
Clears GS_ PDC_VPS_UTC_AVL_ST Interrupt Status register bit
Description
Not necessary to write 0 to this bit as it is a self clearing bit
Clears VITC_AVL_ST Interrupt Status register bit
2
C so that the user can check whether or not the VDP has
Description
Teletext not detected
Teletext detected
343
ADV7604