different function controls, that is, BIT_WIDTH[1:0], MODE_SEL[2:0], and
OP_MODE_SEL[2:0]. (Refer to
OP_MODE_SEL[2:0]
OP_MODE_SEL[2:0], IO Map, Address 0x03, [7:5]
Function
OP_MODE_SEL[2:0]
000
001
010
011
100
101
110
111
Bus swapping and bus reordering controls are available.
buses to be shuffled around, providing six different output possibilities.
PIXBUS_MSB_TO_LSB_REORDER
MODE_SEL[2:0], IO Map, Address 0x03, [4:2]
Function
MODE_SEL[1:0]
000
001
010
011
MODE_SEL[2:0]
is generally only applicable for 12-bit output modes that use one or two buses,
and is used to reposition the lower two or four bits of a data bus to a different bus to provide the
maximum flexibility for interfacing to back end devices. For a full description of the different
modes, refer to the spreadsheet, ADV7604 output pixel port mapping.xls, as illustrated in
BIT_WIDTH[1:0], IO Map, Address 0x03, [1:0]
Function
BIT_WIDTH[1:0]
00
01
10
11
Table 7
lists some commonly used configurations of
Rev. F August 2010
Table
6.)
Table 6: Sub Functions of OP_FORMAT_SEL[7:0]
OP_FORMAT_SEL[7:0]
MODE_SEL[2:0]
Description
4:2:2 SDR (pseudo DDR)
4:2:2 DDR
4:4:4 SDR
4:4:4 DDR (CLK/2)
4:2:2 SDR
ADI_CM
Reserved
Reserved
allows the pixel sequence to be modified.
Description
Mode 0 – 12-bit compatible output mode
Mode 1 – 10-bit compatible output mode (two LSBs on a different bus)
Mode 2 – 8-bit compatible output mode (four LSBs on a different bus)
Reserved
Description
8-bit output
10-bit output
12-bit output
Reserved
OP_CH_SEL[2:0]
OP_FORMAT_SEL[7:0].
58
BIT_WIDTH[1:0]
allows the three output
Figure
ADV7604
7.
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