Synchronization Output Selection - Analog Devices Advantiv ADV7604 Hardware Manual

3.5.8

Synchronization Output Selection

VS_OUT_SEL, IO Map, Address 0x06 [7]
This bit selects the signal that is output on the VS/FIELD pin.
Function
VS_OUT_SEL
0
1
F_OUT_SEL, IO Map, Address 0x05, [4]
This bit selects the signal that is output on the FIELD/DE pin.
Function
F_OUT_SEL
0
1
HS_OUT_SEL[1:0], IO Map, Address 0x05, [6:5]
This bit selects the signal that is output on HS/CS pin.
Function
HS_OUT_SEL[1:0]
00
01
10
11
Rev. F August 2010
Description
Field signal output on VS/FIELD pin
VS output on the VS/FIELD pin
Description
DE output on FIELD/DE pin
FIELD output on FIELD/DE pin
Description
Regenerated CSync signal, synchronous to LLC
Regenerated HSync signal, synchronous to LLC
HSync input synchronous to XTAL
Depending on the result of the SSPD, the signal output on HS/CS pin
is:
• A logic AND of HSync and VSync input after polarity correction
if HSync/VSync is detected by the SSPD
• The CSync input if CSync/VSync is detected by the SSPD
• The sliced SOG if an embedded sync is detected by SSPD
41
ADV7604