Figure 123: Av.link Receiver State Machine - Analog Devices Advantiv ADV7604 Hardware Manual

The ADV7604 features the AVLINK_RX_READY_RAW register, which is set to one when a
message is received by the AV.link receive module.
AVLINK_RX_READY_RAW, AV.link Receive Module Ready Raw Status , IO Map, Address
0x4C, [7]
Function
AVLINK_RX_RE
ADY_RAW
0
1
Note: A corresponding interrupt can be enabled for AVLINK_RX_READY_RAW by setting the
mask AVLINK_RX_READY _MB1 (IO Map, Address 0x50 [4]) or AVLINK_RX_READY_MB2
(IO Map, Address 0x4F [4]). Refer to Section
The state machine of the AV.link receiver module is shown in
Invalid Data bit
Drive AV.link line low
for 7.2ms
ERROR
Rev. F August 2010
Description
Do not use
Host set this bit to 1 so that AV.link receive module starts monitoring
AV.link for incoming messages.
IDLE
AVL_RX_ENABLE=1
&& falling edge on
AV.link
START
Valid Start bit
reception
Bit period timing
error
RX_DATA
Falling edge on
AV.link
Byte_done &&
!Frame done
ACK

Figure 123: AV.link Receiver State Machine

14 for additional information on the interrupt feature.
Figure
Invalid Start bit
Drive AV.link line low
for 7.2ms
Mode 3 bit timout
(EON || ECT) bit
done for mode 2
frame
369
123.
(Frame done || bit
period timeout)
(This state is for
mode 2 only)
Timeout period
Done
WAIT_TIMOUT
ADV7604