Analog Devices Advantiv ADV7604 Hardware Manual page 7

13.6 F D
ORMAT ESCRIPTION OF
13.6.1 Mode 1.................................................................................................................................................. 371
13.6.2 Mode 2.................................................................................................................................................. 371
13.6.3 Mode 3.................................................................................................................................................. 371
13.7 M D
ODE ETECTION
13.8 ESC/DIR B
IT
14 INTERRUPTS ....................................................................................................................................................... 374
14.1 I .................................................................................................................................................... 374
NTERRUPTS
14.1.1 Interrupt Request Output Operation .................................................................................................... 374
14.1.2 Interrupt Drive Level............................................................................................................................ 375
14.1.3 Interrupt Manual Assertion.................................................................................................................. 375
14.1.4 Multiple Interrupt Events ..................................................................................................................... 375
14.1.5 HDMI Interrupts Validity Checking Process ....................................................................................... 376
14.1.6 Storing Masked Interrupts.................................................................................................................... 379
14.1.7 Processing AFE Interrupts................................................................................................................... 380
15 HARDWARE DESIGN ........................................................................................................................................ 382
15.1 P S
OWER UPPLY
16 REGISTER ACCESS AND SERIAL PORTS DESCRIPTION ....................................................................... 383
2
16.1 M I C P
AIN ORT
16.1.1 Register Access..................................................................................................................................... 383
16.1.2 Protocol for Main I
16.2 DDC P .................................................................................................................................................... 385
ORTS
2
16.2.1 I C Protocols for Access to the Internal EDID .................................................................................... 385
2
16.2.2 I C Protocols for Access to HDCP Registers....................................................................................... 386
16.2.3 DDC Port A.......................................................................................................................................... 386
16.2.4 DDC Port B.......................................................................................................................................... 386
16.2.5 DDC Port C ......................................................................................................................................... 387
16.2.6 DDC Port D ......................................................................................................................................... 387
APPENDIX A.................................................................................................................................................................. 389
PCB L R
AYOUT ECOMMENDATIONS
A I
NALOGUE NTERFACE
P S B
OWER UPPLY YPASSING
HDMI I ............................................................................................................................................................... 390
NPUTS
D O (D
IGITAL UTPUTS ATA AND
D I ............................................................................................................................................................ 391
IGITAL NPUTS
XTAL L C
AND OAD AP
APPENDIX B .................................................................................................................................................................. 393
R C
ECOMMENDED ONFIGURATION FOR
APPENDIX C.................................................................................................................................................................. 400
P O D
ACKAGE UTLINE RAWING
O G ......................................................................................................................................................... 400
RDERING UIDE
LIST OF FIGURES ........................................................................................................................................................ 401
LIST OF TABLES .......................................................................................................................................................... 403
LIST OF EQUATIONS.................................................................................................................................................. 405
DOCUMENT REVISION HISTORY........................................................................................................................... 406
Rev. F August 2010
T
RANSMITTED
.......................................................................................................................................... 372
V ............................................................................................................................ 373
ALIDATION
S ............................................................................................................................. 382
EQUENCE
............................................................................................................................................... 383
2
C Port .................................................................................................................. 384
.............................................................................................................................. 389
I .................................................................................................................................... 389
NPUTS
.......................................................................................................................................... 389
C ) ...................................................................................................................... 390
LOCKS
V S ................................................................................................................... 391
ALUE ELECTION
U P
NUSED
...................................................................................................................................... 400
F ......................................................................................... 370
RAMES
................................................................................................... 393
INS
7
ADV7604