RXC_5V
RXD_5V
• DDC pads:
DDCA_SCL
DDCA_SDA
DDCB_SCL
DDCB_SDA
DDCC_SCL
DDCC_SDA
DDCD_SCL
DDCD_SDA
• SPI EEPROM interface pads:
EP_MOSI
EP_MISO
EP_CS
EP_SCK
• Reset pad RESETB
The power-down mode 0 is initiated through either a software (I2C register) configuration or
hardware configuration.
Entering Power-down Mode 0 via Software
The ADV7604 can be put into power-down mode 0 by setting the
value).This method allows for an external processor to put the system in which the ADV7604 is
integrated into standby mode. In this case, the CP and HDMI cores of the ADV7604 are kept
powered up from the main power (e.g. AC power) and set in or out of power-down mode 0 through
the
POWER_DOWN
Entering Power-down Mode 0 via Hardware
The ADV7604 can be put into power-down mode 0 by feeding a low voltage on the PWRDNB pin.
This hardware functionality allows the internal EDID to be available even if the main supply (e.g.
AC power) is not available to power up the ADV7604. The +5 V from the HDMI source(s)
connected to the system can be used to provide sufficient power for the sections and pads activated in
power-down mode 0.
In this case, the ADV7604 will power up into power-down mode 0. On power up the EDID/Repeater
controllers load automatically the EDID image from the external SPI EEPROM into the internal
RAM space dedicated to store the EDID image. The EDID/Repeater controller then enables the
internal EDID on all ports.
The power consumption of the ADV7604 is limited and is less than 30 mA in power-down mode 0.
This allows the part to be powered by the 5 V signal from one or more HDMI ports when the
ADV7604 enters power-down mode 0 through the PWRDNB pin. The internal EDID is also
accessible through the DDC bus for ports A, B, C, and D in both power-down mode 0 and mode 1.
Rev. F August 2010
bit.
POWER_DOWN
29
ADV7604
bit to 1 (default
Need help?
Do you have a question about the Advantiv ADV7604 and is the answer not in the manual?
Questions and answers