Analog Devices Advantiv ADV7604 Hardware Manual page 5

Component/graphics digitizer with 4:1 multiplexed hdmi receiver
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8.4.2
Selecting Auto or Manual CSC Conversion Mode.................................................................................... 204
8.4.3
Auto Color Space Conversion Matrix ....................................................................................................... 205
8.4.4
HDMI Auto CSC Operation...................................................................................................................... 208
8.4.5
Manual Color Space Conversion Matrix .................................................................................................. 211
8.4.6
CSC in Pass-through Mode....................................................................................................................... 216
8.5
9
ENHANCED STANDARD DEFINITION PROCESSOR................................................................................. 218
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
9.10
9.11
10
COMPONENT PROCESSOR ............................................................................................................................. 226
10.1
10.2
10.3
10.3.1
Features of Manual Gain Control........................................................................................................ 230
10.3.2
Features of Automatic Gain Control.................................................................................................... 230
10.3.3
Manual Gain and Automatic Gain Control Selection .......................................................................... 231
10.3.4
Manual Gain Control ........................................................................................................................... 233
10.3.5
Manual Gain Filter Mode .................................................................................................................... 235
10.3.6
Automatic Gain Control ....................................................................................................................... 235
10.3.7
CP Peak Active Video Readback.......................................................................................................... 239
10.4
10.5
10.6
10.6.1
Pregain Block....................................................................................................................................... 245
10.7
10.7.1
Sync Extracted by ESDP Block ............................................................................................................ 251
10.7.2
Sync Extracted by Sync Slicer Section.................................................................................................. 252
10.7.3
External Sync and Sync from HDMI Section ....................................................................................... 253
10.7.4
Final Sync Muxing Stage...................................................................................................................... 256
10.8
10.8.1
Synchronization Source Polarity Detector........................................................................................... 259
10.8.2
Standard Detection and Identification ................................................................................................. 267
10.8.3
Detailed Mechanism of STDI Block Horizontal/Vertical Lock Mechanism ......................................... 270
10.9
10.9.1
CP Primary Synchronization Signals................................................................................................... 279
10.9.2
HSync Timing Controls ........................................................................................................................ 279
10.9.3
VSync Timing Controls......................................................................................................................... 283
10.9.4
DE Timing Controls ............................................................................................................................. 284
10.9.5
FIELD Timing Controls ....................................................................................................................... 285
10.9.6
Secondary Synchronization Signals ..................................................................................................... 293
10.9.7
Ancillary Synchronization Signal Outputs ........................................................................................... 293
10.10
10.11
10.11.1
Measurement Window .......................................................................................................................... 298
10.11.2
Noise Measurement.............................................................................................................................. 298
10.11.3
Calibration Measurement .................................................................................................................... 299
10.12
10.13
10.13.1
Free Run Mode Thresholds .................................................................................................................. 300
Rev. F August 2010
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5
ADV7604

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