EIA_861_COMPLIANCE , CP Map, Address 0x69, [2]
This bit set the start of the VBI for the 525p standard only.
Function
EIA_861_COMPLIANCE
0
1
10.9.3 VSync Timing Controls
Programming of the VS timing signals is listed in this section. The VS signal is shown in
Figure
95,
Figure
96,
described manner.
Characteristic
START_VS
range maximum
START_VS
range minimum
END_VS range
maximum
END_VS range
minimum
START_VS[3:0] Start VS Signal , CP Map, Address 0x7F, [3:0]
This 4-bit word operates in a twos compliment mode. Shifting the leading edge of the VSync
towards active video is achieved by selecting from the range 0x0 to 0x7. Shifting the leading edge
of the VSync away from active video is achieved by selecting from the range 0x8 to 0xF. One LSB
increment is equivalent to a 1 line shift.
Examples of how to control the start of the VS timing signal:
START_VS[3:0]
0000
0001
0011
0111
1111
1101
1000
1
VS closer to start of active video
2
VS away from start of active video
Rev. F August 2010
Description
The VBI region starts on line 1
The VBI region starts on line 523 (The start of VBI region is
compliant with the 861 specification)
Figure
97,
Figure
98,
Table 61: VS Default Timing
Units
Direction 525i
Lines
→
Lines
←
Lines
→
Lines
←
Hex
Result
0x0
No move (default)
0x1
1 HS shift later than default
0x3
3 HS shift later than default
0x0
7 HS shift later than default
0xF
1 HS shift earlier than default
0xD
3 HS shift earlier than default
0x8
8 HS shift earlier than default
Figure
100, and
Figure 101
625i
525p
7
7
7
8
8
8
7
7
7
8
8
8
283
and can be adjusted in the
625p
720p
7
7
8
8
7
7
8
8
Note
1
Minimum →
Maximum →
2
Minimum ←
Maximum ←
ADV7604
Figure
94,
1080i
7
8
7
8
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