I 2 C Protocols For Access To Hdcp Registers; Ddc Port A; Ddc Port B; Figure 133: Internal E-Edid And Hdcp Registers Access From Port A - Analog Devices Advantiv ADV7604 Hardware Manual

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16.2.2 I C Protocols for Access to HDCP Registers
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An I C master connected on a DDC port can access the internal EDID using the following protocol:
• Write sequence, as defined in Section
• Read sequence, as defined in Section
• Short read format, as defined in the High-bandwidth Digital Content Protection (HDCP)
System Specifications

16.2.3 DDC Port A

The DDC lines of the HDMI port A comprise the DDCA_SCL and DDCA_SDA pins. An HDMI
host connected to the DDC port A accesses the internal E-EDID at address 0xA0 in read only mode,
and the HDCP registers at address 0x74 in read/write mode (refer to
EDID for port A is described in Section
Refer to the High-bandwidth Digital Content Protection (HDCP) System Specifications for detailed
information on the HDCP registers.

Figure 133: Internal E-EDID and HDCP Registers Access from Port A

16.2.4 DDC Port B

The DDC lines of the HDMI port B comprise the DDCB_SCL and DDCB_SDA pins. An HDMI
host connected to the DDC port B accesses the internal E-EDID at address 0xA0 in read only mode,
and the HDCP registers at address 0x74 in read/write mode (refer to
EDID for port B is described in Section
Rev. F August 2010
Figure 76: Current Address Read Sequence
16.1.2
16.1.2
7.4.2.
7.4.
386
Figure 133). The internal E-
Figure 134). The internal E-
ADV7604