Analog Devices Advantiv ADV7604 Hardware Manual page 273

CH2_BL[13:0], Block Length for channel 2 Read Back , CP Map, Address 0x49, [5:0]; Address
0x4A, [7:0]
Function
CH2_BL[13:0]
xx xxxx xxxx xxxx
CH1_LCVS[4:0], Line Count in VSync for channel 1 Read Back , CP Map, Address 0xB3, [7:3]
Function
CH1_LCVS[4:0]
x xxxx
CH2_LCVS[4:0],Line Count in VSync for channel 2 Read Back , CP Map, Address 0x4B, [7:3]
Function
CH2_LCVS[4:0]
x xxxx
CH1_LCF[10:0], Line Count in Field for channel 1 Read Back , CP Map, Address 0xB3, [2:0];
Address 0xB4, [7:0]
Function
CH1_LCF[10:0]
xx xxxx xxxx
CH2_LCF[10:0], Line Count in Field for channel 2 Read Back , CP Map, Address 0x4B, [2:0];
Address 0x4C, [7:0]
Function
CH2_LCF[10:0]
xx xxxx xxxx
CH1_FCL[12:0], Number of Xtal Clocks on channel 1 Read Back , CP Map, Address 0xB8,
[4:0]; Address 0xB9, [7:0]
Function
CH1_FCL[12:0]
xxx
CH2_FCL[12:0], Number of Xtal Clocks on channel 2 Read Back , CP Map, Address 0x4D,
[4:0]; Address 0x4E, [7:0]
Function
CH2_FCL[12:0]
xxx
Rev. F August 2010
Description
Number of 28.6363 MHz (XTAL frequency) cycles in a block of eight
lines of incoming video. Data only valid if
high.
Description
Number of lines in a VSync period measured on channel 1. Data only
valid if CH1_STDI_DVALID
Description
Number of lines in a VSync period measured on channel 2. Data only
valid if CH2_STDI_DVALID
Description
Number of lines between two VSyncs measured on channel 1 (= 1
field/frame). Data only valid if
Description
Number of lines between two VSyncs measured on channel 2 (= 1
field/frame). Data only valid if
Description
Number of XTAL clock cycles detected by channel 1 STDI block
between successive VSyncs on channel 1. The readback from this
register is valid if CH1_STDI_DVALID
Description
Number of XTAL clock cycles detected by channel 2 STDI block
between successive VSyncs on channel 2. The readback from this
register is valid if CH2_STDI_DVALID
CH2_STDI_DVALID
is high.
is high.
CH1_STDI_DVALID
CH2_STDI_DVALID
is high.
is high.
273
ADV7604
is
is high.
is high.