Sync 1, Sync 2, Sync 3 And Sync 4 Input Control; Figure 12: Adv7604 Afe Functional Diagram - Analog Devices Advantiv ADV7604 Hardware Manual

ANALOG FRONT END (AFE)
Ain4
Ain5
Ain6
Ain 7
Ain 8
Ain 9
Ain 9
Ain4
Ain5
Ain6
AIN_SEL[2:0]
SYNC 2
SYNC 3
emb_ sync_ 1 _ sel_man [1:0]
emb_ sync_ sel_man [1:0]
2 _
6.4

SYNC 1, SYNC 2, SYNC 3 and SYNC 4 Input Control

As shown in Figure 12, the ADV7604 has four input synchronization control pins: SYNC 1, SYNC
2, SYNC 3, and SYNC 4. These synchronization inputs can be muxed to two synchronization
strippers also in the AFE. From here, the signals are routed to synchronization processors in the CP.
This muxing can be performed in an automatic configuration mode (AIN_SEL [2:0]) or,
alternatively, with manual control. These are described in Sections
EMB_SYNC_SEL_1 should be considered as the main synchronization path for this muxing
arrangement.
EMB_SYNC_SEL_2 should be considered for monitoring purposes in parallel to the main
processing path.
Rev. F August 2010
001
Voltage
Clamp
Voltage
Clamp
010
Voltage
Clamp
Voltage
100
Clamp
00
01
10
SYNC1_FILTER_SEL[1:0]
00
01
10
SYNC2_FILTER_SEL[1:0]

Figure 12: ADV7604 AFE Functional Diagram

70
12
ADC 0
12
ADC 1
12
ADC 2
12
ADC 3
SYNC EMB_SYNC_SEL_1
STRIPPER1
SYNC
EMB_SYNC_SEL_2
STRIPPER 2
6.4.1
ADV7604
Sync Channel
Processor
COMPONENT PROCESSOR (CP)
and 6.4.2 respectively.